Calling All PCell Designers: CiraNova Launches Worldwide Design Contest for the Most Elegant, Beautiful, and Sleek PCell Designs, With Mac minis or Cash Prizes Going to Ten Best Designers

CGIDir
Wednesday, July 5, 2006; 08:23 AM

Designing the world's most elegant, beautiful, and sleek PCells will bring a chance of winning an Apple Mac mini or a cash prize to ten lucky designers this summer. CiraNova is holding a competition to mark the new release of its PyCell Studio. This new software gives PCell designers the freedom to create universal PCells usable in any OpenAccess tool.

"In the five months since it was released, PyCell Studio has been downloaded by PCell designers in 14 countries," said Ed Petrus, COO of CiraNova. "With its new integrated design rule checking capability, designers using PyCell Studio can now create and verify PCell designs without requiring a layout editor or DRC license. We look forward to seeing the exciting new PyCells submitted to the contest, and then sending a Mac mini or cash prize to each of the ten winners."

The contest is open to participants worldwide. Entries may be submitted until 5:00 p.m. PDT on August 31, 2006. Winners will be notified and announced by CiraNova on September 12, 2006. To sign up for the contest, visit http://www.ciranova.com/ and click on the contest link.

CiraNova PyCell Studio is a stand-alone environment for creating universal PCells that are usable in any OpenAccess tool. PyCell Studio features a brand-new API accessed as a Python extension language, a sophisticated Python IDE (Integrated Development Environment), a graphical viewer with an interactive DRC checker, and the power to easily handle conditional rules. With PyCell Studio, a designer writes a PCell library just once, and it will work with full parameterization in all OpenAccess based tools.

Privately held CiraNova is headquartered in Santa Clara, Calif., and operates worldwide. Its first product, PyCell Studio, helps designers reduce the time and cost of PCell creation for deep submicron processes. Future products will build on this technology to speed the creation of AMS circuits and blocks and to create reusable analog IP.